2

When I check my CPU Cache with command dmidecode, I get Cache configuration to be Not Socketed. What does that mean?

prayag@prayag:~/hacker_/draobkcalb$ sudo dmidecode -t cache
# dmidecode 2.11
SMBIOS 2.5 present.

Handle 0x000A, DMI type 7, 19 bytes
Cache Information
    Socket Designation: Internal Cache
    Configuration: Enabled, Not Socketed, Level 1
    Operational Mode: Write Back
    Location: Internal
    Installed Size: 32 kB
    Maximum Size: 32 kB
    Supported SRAM Types:
        Synchronous
    Installed SRAM Type: Synchronous
    Speed: Unknown
    Error Correction Type: Unknown
    System Type: Unknown
    Associativity: Unknown

Handle 0x000B, DMI type 7, 19 bytes
Cache Information
    Socket Designation: External Cache
    Configuration: Enabled, Not Socketed, Level 2
    Operational Mode: Write Back
    Location: External
    Installed Size: 2048 kB
    Maximum Size: 2048 kB
    Supported SRAM Types:
        Synchronous
    Installed SRAM Type: Synchronous
    Speed: Unknown
    Error Correction Type: Unknown
    System Type: Unknown
    Associativity: Unknown
Gilles 'SO- stop being evil'
  • 807,993
  • 194
  • 1,674
  • 2,175
prayagupa
  • 4,797
  • 12
  • 32
  • 38
  • 1
    Probably means that it's not on an independent chip that can be pulled in/out (i.e. has its own socket). – Mat Sep 20 '13 at 07:37
  • 1
    I think Mat's right, it means that the cache is not mounted via a socket on the PCB. – slm Sep 20 '13 at 09:22

1 Answers1

5

According to the relevant dmidecode source code, the information presented by the program comes from the DTMF SMBIOS documentation that you can find here.

On page 59 of the 2.8.0 version of the SMBIOS spec, the reference to the bits, tested for by dmidecode, is given, but without a clear definition of what 'socketed' means (at least not in any of the preceding pages).

For normal memory and CPUs 'socket' is used in that document as a physical place an item can be inserted. A socket might be available and/or populated. From this I think you can safely assume that 'Not socketed' means the Level 1 and 2 caches on your machine do not have have a separate physical socket.

For modern processors—with caches at the speed they are—a cache external to the CPU chip ('socketed' on their own) would probably not be able to run at competitive speeds. But I remember this was not always the case and that installing CPU cache memory was optional.

Anthon
  • 78,313
  • 42
  • 165
  • 222
  • On the original Pentium mainboards you could add a ["Cache on a stick" module](http://en.wikipedia.org/wiki/Cache_on_a_stick) that was used as L2 cache, because those CPUs only had L1 cache. These modules would probably count as "socketed cache". – Martin von Wittich Sep 20 '13 at 11:03
  • @MartinvonWittich, I seem to remember the pentium having L2 cache. The last time I saw socketed cache was on a 386. – psusi Sep 20 '13 at 17:48
  • @psusi the [Pentium 1](http://en.wikipedia.org/wiki/Intel_P5) had only L1 cache. The COASt article linked in my first comment also has a [picture of a Pentium 1 133 MHz with a COASt slot](http://en.wikipedia.org/wiki/File:COAST_CPU.jpg) :) – Martin von Wittich Sep 20 '13 at 19:32
  • Pentium 2 and 3 cache was sort of socketed. It was in separate chips that were glued into the back of the slot package. – Zan Lynx Sep 20 '13 at 23:11